Husain Parvez

Associate Professor
PAF-Karachi Institute of Economics and Technology
Main Campus, Korangi Creek, Karachi-75190, Pakistan
Web: gsse.pafkiet.edu.pk/HusainParvez
Email: husain.parvez@pafkiet.edu.pk
 
 
 
Husain Parvez received his Bachelors of Engineering in Computer Science from National University of Sciences and Technology, Rawalpindi. He received MS and PhD in Electronics and Computer Science from University Pierre & Marie Curie (Paris-6), Paris. Before doing MS and PhD, he worked at the System-on-Chip tools department at Communications Enabling Technologies Islamabad, and at Video Decoder & Optimization department at Streaming Networks Islamabad. He has taught at University Pierre & Marie Curie, Paris, and at IQRA University, Karachi. He is associated with PAF-KIET since 2012. His current research interests include design and exploration of FPGA architectures and related CAD tools for FPGAs.
 
Dr. Parvez was the co-principal investigator of two ICTR&D funded projects, each worth 14 million rupees. He is also working on funded projects of mutual interest in collaboration with international partners. He has authored and co-authored 5 publications in high impact journals, and 15 papers in international conferences. He has also authored a book titled “Application-Specific Mesh-based Heterogeneous FPGA Architectures” published by Springer.
   

 

Profile

Book Publication

  1. Husain Parvez and Habib Mehrez. "Application-Specific Mesh-based Heterogeneous FPGA Architectures" (2011) Springer-US pp:1-150

Journal Publications

  1. Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez, "Exploration and optimization of homogeneous tree-based application specific FPGA", Elsevier Journal of Microelectronics, January 2013, ISSN 0026-2692. 
  2. Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez, "A New Tree-based Application Specific FPGA and Its Comparison with Mesh-based Application Specific FPGA", Elsevier Journal of Microprocessors and Microsystems, Vol 36, Issue 8, November 2012, pp: 588-605
  3. Husain Parvez, Zied Marrakchi, Alp Kilic, Habib Mehrez "Application Specific FPGA using Heterogeneous logic blocks" (2011) Transactions on Reconfigurable Technology and Systems (TRETS) Vol: 4, Issue 3: August 2011
  4. Umer Farooq, Husain Parvez, Zied Marrakchi and Habib Mehrez "Exploration of Heterogeneous FPGA Architectures" (2011) International Journal of Reconfigurable computing under the Special Issue of RecoSoc 2010, Hindwai Publishing Corporation Vol:2011 pp:1-18

Referred Conference Publications and Book Chapters

  1. Umer Farooq, Husain Parvez, Zied Marrakchi and Habib Mehrez "Exploring the effect of LUT and Arity Size on a Tree-based Application Specific Inflexible FPGA" (2011) DTIS 2011
  2. Umer Farooq, Husain Parvez, Zied Marrakchi and Habib Mehrez "Comparison between Heterogeneous Mesh-based and Tree-based Application Specific FPGA" (2011) LNCS, Springer Vol:6578/2011 pp:218-229
  3. Umer Farooq, Husain Parvez, Zied Marrakchi and Habib Mehrez. "Exploration of Heterogeneous FPGA Architectures," Reconfigurable Communication-centric, ReCoSoC10, May, 2010, Karlsruhe, Germany pp:37-44
  4. Husain Parvez, Zied Marrakchi and Habib Mehrez. "Application Specific FPGA Using Heterogeneous Logic Blocks," (2010) International Symposium on Applied Reconfigurable, ARC, LNCS Springer, March 2010, Bangkok, Thailand Vol:5992 pp:92-109
  5. Husain Parvez, Zied Marrakchi and Habib Mehrez. "Heterogeneous-ASIF: An Application Specific Inflexible FPGA using Heterogeneous logic blocks," (2010) International Symposium on Field-Programmable Gate Arrays, FPGA'10, February 2010, Monterey, California pp:290-290
  6. Husain Parvez, Zied Marrakchi and Habib Mehrez. "ASIF: Application Specific Inflexible FPGA," International Conference on Field-Programmable Technology, ICFPT'09, December 2009, Sydney, Australia pp:112-119
  7. Umer Farooq, Husain Parvez, Zied Marrakchi and Habib Mehrez. "A New Tree-based Coarse-grained FPGA Architecture," IEEE International Conference on PhD. Research in MicroElectronics, PRIME'09, July 2009, Cork, Ireland pp:48-51
  8. Husain Parvez, Zied Marrakchi and Habib Mehrez. "Enhanced Methodology and Tools for Exploring Domain-specific Coarse-grained FPGAs," IEEE International Conference on Reconfigurable Computing, Reconfig'08, December 2008, Cancun, Mexico pp:121-126
  9. Husain Parvez, Umer Farooq, Zied Marrakchi and Habib Mehrez. "A New Coarse-grained FPGA Architecture Exploration Environment," International Conference on Field-Programmable Technology, ICFPT'08, December 2008, Taipei, Taiwan pp:285-288
  10. Husain Parvez, Hayder Mrabet and Habib Mehrez. "Generic Techniques and CAD tools for automated generation of FPGA layout," IEEE International Conference on PhD. Research in MicroElectronics, PRIME'08, June 2008, Istanbul, Turkey

I supervise the Embedded Systems Research Group at KIET.

Current funded projects:

 

Current research interests:

  • Architectures and Tools for Reconfigurable Architectures
  • FPGA-based System design
  • Embedded real-time Systems 

 

Education

PhD. Computer Science & Electronics
Thesis: Design and Exploration of Application Specific Mesh-based Heterogeneous FPGA architectures
University Pierre & Marie Curie (Paris-6), Paris, France

Sep 2006 – June 2010

M.S. Embedded Systems
Specialization: Architecture and Design of Integrated Systems
University Pierre & Marie Curie (Paris-6), Paris, France

Sep 2005 – Sep 2006

B.E. Software Engineering
College of Signals, N.U.S.T, Rawalpindi, Pakistan.

 

Nov 1998 – June 2002

 

PhD Experience

  • Thesis on "Design and Exploration of Application-Specific Heterogeneous FPGA Architectures"
    • Design and development of an exploration environment for heterogeneous FPGA Architectures
    • Automatic FPGA layout generator
    • Tape out of 1024 LUT-4 based FPGA using 130nm 6 metal layer CMOS process
    • ASIF : Application Specific Inflexbile FPGA
    • Automatic ASIF hardware generator

 

Industrial Experience

Streaming Networks, Islamabad, Pakistan

March 2003 - May 2005

  • Optimization of Mpeg-4 based Media Player for TriMedia (Philips VLIW processor)

  • Optimization of H264 decoder for TriMedia (Philips VLIW processor)

  • Development of other supporting utilities

 

Communications Enabling Technologies, Islamabad, Pakistan

January 2002 - March 2003

  • Design & Development of a C Language Compiler Back-End for 'AVAZ' Media Processor (VLIW core)

  • Development of an Assembler for Authentication Engine (VLIW core)

  • Development of a Simulator/Debugger for Authentication Engine (VLIW core)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Teaching Experience

I have performed teaching duties at the following academic institutions
  • Assistant Professor
    PAF-Karachi Institute of Economics and Technology, Karachi, Pakistan
    Jan 2012 - Date

  • Assistant Professor
    IQRA University, Karachi, Pakistan.
    Oct 2010 - Jan 2012 (1 year 4 months)

  • Lecturer (Monitorat)
    University Pierre & Marie Curie (Paris-6), Paris, France    
    Oct 2006 - Sep 2009 (3 years)

 

I have been involved in teaching the following major courses.

Graduate Level Courses

  • Reconfigurable Computing

  • Advanced Computer Architecture

  • Embedded Systems Design

  • FPGA-based System Design 

Undergraduate Level Courses

  • FPGA-based System Design

  • Embedded Systems

  • VLSI System Design

  • Computer Architecture

  • Microprocessor based System  Design

  • Digital Logic Design